Doctor at Sun Yat-Sen University, China
Professional Profile
Summary
Dr. Wei Liu is a dedicated postdoctoral researcher specializing in microelectronics, hardware security, and neuromorphic computing. Based in Guangzhou, he is currently affiliated with the School of Microelectronics Science and Technology at Sun Yat-sen University. With a strong foundation in communications and microelectronics, Dr. Liu has built a multidisciplinary research profile at the intersection of neural hardware, stochastic computing, and secure circuit design. As an IEEE member, he actively contributes to the academic community through impactful publications and collaborative projects.
Educational Details
Dr. Liu earned his Ph.D. in Microelectronics and Solid-State Electronics from Sun Yat-sen University in 2024, where he focused on integrating stochastic methods with neuromorphic design. He completed his M.S. in Microelectronics from Tsinghua University, Beijing, in 2015, gaining advanced training in semiconductor devices and circuit design. His academic journey began with a B.S. in Communications Engineering from Wuhan University of Technology in 2010, laying the foundation for his future research in intelligent and secure hardware systems.
Professional Experience
Currently, Dr. Liu serves as a postdoctoral researcher at the School of Microelectronics Science and Technology, Sun Yat-sen University. In this role, he is engaged in cutting-edge research projects involving neuromorphic hardware development, stochastic computing applications, and secure architecture design. His work includes system-level modeling, hardware acceleration, and circuit optimization for low-power and fault-tolerant computing. He has collaborated with leading researchers and contributed to multiple high-impact journals and conferences.
Research Interests
Dr. Liu's primary research interests lie in neuromorphic computing, where he develops brain-inspired systems for efficient and adaptive processing; stochastic computing, exploring its potential in energy-constrained and approximate computing; and hardware security, focusing on resilient architectures and cryptographic techniques to mitigate vulnerabilities in modern electronic systems. His interdisciplinary approach addresses pressing challenges in next-generation intelligent electronics.
Author Metrics
Dr. Liu has co-authored several peer-reviewed articles in high-impact journals such as IEEE Transactions on Biomedical Circuits and Systems and Electronics. Notable publications include innovations in approximate spiking neural networks and biologically plausible neuron models using stochastic computation. His work has been cited for its contributions to low-cost and energy-efficient neuromorphic architectures. His metrics reflect a growing influence in the field of microelectronics and computational neuroscience.
Awards and Honors
Dr. Liu has been recognized for his academic excellence and research contributions, earning accolades at national and international conferences. His work on SC-IZ and SC-PLR has received attention for bridging biological plausibility with practical neuromorphic hardware implementations. As an IEEE member, he actively participates in technical communities and workshops, contributing to the advancement of low-power intelligent systems.
Publication Top Notes
1. SCSC: Leveraging Sparsity and Fault-Tolerance for Energy-Efficient Spiking Neural Networks
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Publication Date: January 20, 2025
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Publication Type: Conference Paper
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Conference: 30th Asia and South Pacific Design Automation Conference (ASP-DAC)
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DOI: 10.1145/3658617.3697718
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Contributors: Bo Li, Yue Liu, Wei Liu, Jinghai Wang, Xiao Huang, Zhiyi Yu, Shanlin Xiao
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Summary: This paper presents the SCSC framework that enhances energy efficiency in spiking neural networks by leveraging neuron-level sparsity and fault-tolerance features. It targets low-power applications in neuromorphic computing systems.
2. SC-PLR: An Approximate Spiking Neural Network Accelerator With On-Chip Predictive Learning Rule
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Publication Date: October 2024
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Publication Type: Journal Article
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Journal: IEEE Transactions on Biomedical Circuits and Systems
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Contributors: Wei Liu, Shanlin Xiao, Yue Liu, Zhiyi Yu
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Summary: SC-PLR introduces a neuromorphic accelerator using a novel predictive learning rule implemented on-chip. It reduces computational complexity while maintaining biological plausibility and hardware efficiency.
3. SC-IZ: A Low-Cost Biologically Plausible Izhikevich Neuron for Large-Scale Neuromorphic Systems Using Stochastic Computing
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Publication Date: February 27, 2024
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Publication Type: Journal Article
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Journal: Electronics (MDPI), Volume 13, Issue 5, Article 909
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Contributors: Wei Liu, Shanlin Xiao, Bo Li, Zhiyi Yu
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Summary: This work proposes SC-IZ, a biologically plausible and low-cost implementation of the Izhikevich neuron using stochastic computing, scalable for large neuromorphic systems.
4. Low-Cost Adaptive Exponential Integrate-and-Fire Neuron Using Stochastic Computing
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Publication Date: October 2020
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Publication Type: Journal Article
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Journal: IEEE Transactions on Biomedical Circuits and Systems, Volume 14, Issue 5, Pages 942–950
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Contributors: Shanlin Xiao, Wei Liu, Yuhao Guo, Zhiyi Yu
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Summary: This paper introduces a compact, low-power model of the adaptive exponential integrate-and-fire neuron leveraging stochastic computing techniques for improved resource efficiency in neuromorphic hardware.
Conclusion
Dr. Wei Liu is an outstanding candidate for the Best Researcher Award in neuromorphic and secure computing, with groundbreaking contributions at the intersection of biology and technology. His innovative work on energy-efficient neural hardware, stochastic computing, and hardware security is shaping the future of intelligent systems. While expanding his global visibility could further amplify his impact, his research trajectory reflects not just promise but accelerating momentum, making him a deserving recipient of this recognition.